114/2016

53.

55,

57.

56,

61.

& 32 : 1 multiplexer can be designed using

A) Two 16 : 1 multiplexers and one two input OR gate
B) Two 16 : 1 multiplexers and one two input AND gate
©) Two 16 : 1 multiplexers and two two input OR gate
D) Two 16 : 1 multiplexers only

. Which logic device is called a data distributor ?
A) Multiplexer B) Encoder
C) Decoder D) Demuttiplexer

A full adder can be realized using

A) One half adder and two OR gates

B) Two half adders and one OR gate
C) Two half adders and two OR gates
D) Two half adders and one AND gates

. The output frequency of a mod-12 counter is 6 kHz. It's input frequency is
A) 6kHz B) 500Hz C) 24 kHz D) 72kHz
Which of the following flip flop is used as a latch ?
ಹ) 710100 B) Master slave flip 1100
C) JK flip flop D) D flip flop
. Adecoder with 64 output lines has select lines.
A) 4 B) 6 C) 12 D) 8
The instruction queue in a microprocessor is a group of registers.
A) First in first out B) Last in first out
C) Lastin last out D) Firstin last out
. The physical memory size of 8086 processor is
A) 1terabyte B) 1 Mbyte C) 64 kilobyte D) 20 megabyte
In 8086, the interrupts initiated by executing “INT n” instruction are called
A) Vectored interrupt B) Non vectored interrupt
C) Hardware interrupt D) Software interrupt
. Type 4 interrupt in 8086 is called
A) Divide by zero interrupt B) Break point interrupt
C) Overflow interrupt D) Single step interrupt

In addressing mode, the instruction itself will specify the data to
be operated by the instruction.
A) Direct addressing B) Relative addressing
C) Indexed addressing D} Implied addressing
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