132/2015

Maximum : 100 marks
Time : 1 hour and 15 minutes

For Intel Core i3 processor, GMCH is integrated with :
(ಗ) South Bridge 10)
(C) North Bridge (D) FCH

Tn order to perform a critical task in timeliness, 2 multimedia system may use which of the

following disk scheduling?
‏ه)‎ SSTF ®) SATF
(യ Elevator (D) Real Time

An omega switching network with n CPU and n memories requires how many switches?
കു ) 2 ‏رھ‎ n/2(nlog,n)
)0 log,n D) 2

The minimum pit length for a single layer DVD is :
(ಯ) 500 (B) 400
(©) 600 യു 250

A pipelining system with n segments takes 50 sub operations in a sequence. The time taken
to complete a sub operation in each segment is 8 nsec. 18 the task is completed in 424 nsec,
what is the value of n?

@ 2 ⊽ ® 8
© 4 D) 16

In multiprocessor system, a processor generated signal that serves to prevent other
processors from using the system bus as long as the signal is active can be called as :

(ಗಿ) Semaphore ‏عمط رمق‎
(C) Hardware Lock (D) Critical Session

At the beginning of an instruction cycle, the content of the Instruction Register is 5 and that
of Program Counter is 320. When the instruction is read, the address part of the instruction
is the number 7. Then the effective address in relative address mode is :

ಯ) 328 @) 327
(0) 325 ` D) 342

]0 رھ 0