051/23

17. The advantage of NORA CMOS logic is that

18.

19.

20.

21.

A)

A static CMOS inverter is not required at the output of every dynamic logic
stage. Instead, direct coupling of logic blocks is feasible by alternating nMOS
and pMOS logic blocks.

A static CMOS inverter is required at the output of every dynamic logic stage.
Instead, indirect coupling of logic blocks is feasible by alternating nMOS and
pMOS logic blocks.

A static CMOS inverter is not required at the output of every dynamic logic
stage. Instead, indirect coupling of logic blocks is feasible by alternating nMOS
and pMOS logic blocks.

A static CMOS inverter is required at the output of every dynamic logic stage.
Instead, direct coupling of logic blocks is feasible by alternating nMOS and
pMOS logic blocks.

Consider a process with a subthreshold slope of 100 mV/decade and a DIBL
coefficient of 0.15. How far must the power supply droop to cut subthreshold leakage
by a factor of 2 ?

A)
0)

100 mV B) 150 mV
175 mV D) 200 mV

A CE amplifier has a resistor Re connected between collector and base, Rr = 40k
Ro = 4k. If hy, = 50, rg = 1k, then output resistance Ro is

A)
0)

‎B) 20kQ‏ 2ا40
‎ட) 0.66 2‏ 4/42

‎An amplifier has a open loop gain of 100, an input impedance of 1kQ, and an output
impedance of 100. If a feedback network with a feedback factor of 0.99 is connected
in voltage series feedback mode, then new input and output impedance are

‎A)
‎0)

‎1062 810 162 B) 10Q and 10kQ
100kQ and 2 D) 100kQ and 10kQ

‎If a differential amplifier has a differential gain of 20000. CMRR = 80aB, then common
mode gain is

‎A)

‎2 B) 1 0) 1⁄2 2) 0