Correct Answer:-Question Cancelled

Question9:-Assume that the time required for the five functional units, which
operate in each of the cycles are 10ns, 8ns, 9ns, 10 ns and 7 ns. Find the speed up
versus the single cycle data path if the pipelining adds 1ns of overhead.

A:-4.4
B:-4.0
C:-4.1
D:-6.2
Correct Answer:- Option-B

Question10:-The stage delays in a 4-stage pipeline are 800, 500, 400 and 300
picoseconds. The first stage with a delay of 800 ps is replaced with a functionality
equivalent design involving two stages with respective delays 600 ps and 350 ps.
The throughput increase of the pipeline in percent is

A:-32.35
B:-30.20
C:-33.33
D:-31.25
Correct Answer:- Option-C

Question11:-The interrupt vector location from which RST 7.5 interrupt in 8085
executes the interrupt service routing.

A:-0000H
B:-0075H
C:-003CH
D:-0034H
Correct Answer:- Option-C

Question12:-A small microprocessor's micro instructions has 6 control fields, each
one triggering the following number of control lines

Control field :1 2 3 4 5 6

Number of Control Lines:7 4 5 2 1 3

What is the fewest number of control bits required to describe all the control fields ?

A:-12

B:-6

C:-14

D:-7

Correct Answer:- Option-C

Question13:-A microprogram control unit is required to generate a total of 25
control signals. Assume that during any microinstruction at most two control signals
are active. The minimum number of bits required in the control word to generate
the required control signals will be

A:-12