Kerala PSC Previous Years Question Paper & Answer
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Below are the scanned copy of Kerala Public Service Commission (KPSC) Question Paper with answer keys of Exam Name 'Assistant Engineer - United Electrical Industries Ltd' And exam conducted in the year 2023. And Question paper code was '231/2023'. Medium of question paper was in Malayalam or English . Booklet Alphacode was 'A'. Answer keys are given at the bottom, but we suggest you to try answering the questions yourself and compare the key along wih to check your performance. Because we would like you to do and practice by yourself.
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If ‘f,’ is the resonant frequency of parallel LC circuit and ‘f,’ is that of parallel RLC circuit,
then which of the following is correct?
^ ॥ =¢ (8) f,=\27h
© f= 27h ൯൬) ടത
Which of the following amplifier configuration has highest input impedance?
(A) Cascaded amplifier (B) Cascode amplifier
(C) Push pull amplifier (0) Boot strap darlington amplifier
In a CE amplifier circuit, transistor is biased in such a way that the quiescent operating
point is situated towards saturation on the load line. Which of the following is correct
regarding the output voltage?
(^) Sinusoidal waveform with clipped positive half cycles
(B) Sinusoidal waveform with clipped negative half cycles
(C) Pure Sinusoidal waveform
(D) Sinusoidal waveform with clipped positive and negative half cycles
In hexadecimal system, the decimal 5° is:
(A) 314 (B) OCB
(C) 271 (D) IBC
Due to —————_, MOS logic gates do not have current hogging problem.
(A) High impedance of gate terminal
(B) High impedance of source terminal
(C) Low impedance of drain terminal
(D) Low impedance of source and gate terminals
Dynamic power consumed by a CMOS, logic circuit operating at frequency ‘f’ is proportional
to:
(A) Vo ¢) Mp
(60 71 ©) 71%
CMOS inverter can act as amplifier, when :
(^) NMOS in saturation, PMOS in linear
(B) NMOS in linear, PMOS in saturation
(C) NMOS and PMOS in saturation
(D) NMOS and PMOS in linear
15 231/2023
[P.T.0.]